Synopsys Introduces Software-Defined Hardware-Assisted Verification to Enable AI Proliferation

NodeGuardian

2026-03-23 12:00:35

Abstract generation in progress

Synopsys has announced advancements in its hardware-assisted verification (HAV) portfolio, introducing software-defined capabilities and new platforms to address the increasing demand for AI chip verification. These innovations aim to accelerate AI silicon innovation from data centers to the edge by boosting performance, scaling capacity, and enabling industry-first hardware-assisted test automation. The new HAPS and ZeBu platforms offer enhanced performance and capacity for various AI applications, leveraging AMD’s technology to accelerate system validation and reduce time-to-market.

This page may contain third-party content, which is provided for information purposes only (not representations/warranties) and should not be considered as an endorsement of its views by Gate, nor as financial or professional advice. See Disclaimer for details.